1. Field of the Invention
The present invention relates to an interface circuit between a control apparatus and an input/output device, and more particularly, to a reduction in power consumption in an interface circuit of the ATA standard.
2. Description of the Related Art
FIG. 2 of the accompanying drawings is a schematic diagram of a conventional interface circuit. The interface circuit is disclosed in Japanese Patent Application Kokai (Laid-Open) No. 2003-234649.
This interface circuit is a bi-directional data bus of the ATA standard which is widely employed as an interface for connecting a control apparatus such as a computer to a peripheral device such as a hard disk drive, a CD-ROM drive and the like. While the data bus is defined to have a 16-bit width in the ATA standard, this figure shows components associated with only one of 16 bits.
In a system conforming to the ATA standard, a connection between a control apparatus 101 and a peripheral device 121 is made by connectors 111 and a cable 112. Also, the standard defines that the control apparatus 101 adds only a damping resistor 102 to a data bus on its internal board and the peripheral device 121 adds only a damping resistor 122 to the data bus on its internal board.
A controller 103 in the control apparatus 101 has a three-state buffer 105 for controlling the output of output data DO1 to a bi-directional bus 104 in accordance with an output enable signal /OE1 (where “/” means an inverse logic). The controller 103 also has a buffer 106 for fetching a signal on the bi-directional bus 104 as input data DI1. Likewise, a controller 123 in the peripheral device 121 has a three-state buffer 125 for controlling the output of output data DO2 to a bi-directional bus 124 in accordance with an output enable signal /OE2, and a buffer 126 for fetching a signal on the bi-directional bus 124 as input data DI2.
The three-state buffer 105, 125 transfers a signal at the input to the output when the output enable signal /OE1, /OE2 applied to control terminal is active (level “L”). The three-state buffer 105, 125 brings the output into a high-impedance state, i.e., a floating state, when the output enable signal /OE1, /OE2 is inactive (level “H”).
In such an interface circuit, for example, when data is transferred from the control apparatus 101 to the peripheral device 121, the control apparatus 101 switches the output enable signal OE1 to an active state, and supplies data to be transferred, i.e., output data DO1, to the three-state buffer 105.
In the peripheral device 121, the output enable signal /OE2 remains in an inactive state except when data is transmitted, so that the output of the three-state buffer 125 is in a high-impedance state. Therefore, the data sent from the three-state buffer 105 of the control apparatus 101 is transferred to the bi-directional bus 124 in the peripheral device 121 through the connectors 111 and cable 112. Then, the data on the bi-directional bus 124 is introduced into the peripheral device 121 by the buffer 126 as input data DI2. When data is transferred from the peripheral device 121 to the control apparatus 101, operations reverse to the foregoing are performed.
The interface circuit described above has the following problems.
When neither the control apparatus 101 nor peripheral device 121 is outputting data, the outputs of the three-state buffers 105 and 125 are in a high-impedance state, causing the bi-directional buses 104 and 124 to enter a floating state, respectively. Thus, the input levels of the buffers 106 and 126 connected to the bi-directional buses 104 and 124 are not fixed to “H” or “L” but become close to a logical threshold voltage, causing a through current to flow. This increases consumed current.
To address this problem, one approach may be taken; data bus may be fixed to a pull-up or a pull-down state in the control apparatus. However, some peripheral devices themselves perform this pull-up or pull-down operation, so that it is not desirable to employ the above mentioned approach with all peripheral devices. For example, when the control apparatus pulls down the data bus, and a peripheral device which is pulling up the data bus is connected to the control apparatus, then extra current will flow. Also, some peripheral devices set a voltage level of signals at 5 V, while other devices set the voltage level at 3.3 V, so that the pull-up voltage cannot be uniquely determined even if the control apparatus attempts to pull up.
Another solution is to continue to drive the data bus by the control apparatus even if the data bus is not accessed. However, this is not a definite solution because some peripheral devices are performing the pull-up or pull-down operation, and the data bus may be continuously driven even when no peripheral device is accessing.